The INA299A3IDBVR ships with a 100 V/V gain option and a typical input offset of 150 μV—specs that enable sub-0.1% current-sense accuracy in many low-side and high-side measurement applications. This article summarizes official datasheet specs, presents measured performance benchmarks from controlled lab methods, and provides practical design takeaways engineers can apply when integrating the device into power-management and battery-monitoring systems.
The INA299A3IDBVR is a single-channel, bidirectional current-sense amplifier in a compact SOT-23-6 footprint. Its 100 V/V gain variant (A3) targets accurate measurement of small shunt voltages for power management, battery monitoring, DC–DC current measurement and motor-control telemetry. Typical markets include industrial and consumer battery systems where space and accuracy are both constrained; designers value the small package and bidirectional sensing capability when implementing high- and low-side current monitoring.
Key datasheet specs used as baselines for testing include: supply range 2.7–12 V; gain options 20, 50, 100 V/V (A3 = 100 V/V); input offset typ. 150 μV; bandwidth ≈650 kHz; supply current ≈650 μA; CMRR and PSRR rated for the device’s specified common-mode range; operating temperature down to −40 °C up to 125 °C; SOT-23-6 package. These specs set design limits—most importantly common-mode voltage range and thermal limits—which the measured results below reference against the datasheet baseline.
Test hardware comprised a SOT-23-6 breakout DUT board with Kelvin shunt pads, precision shunts from 0.01 Ω to 1 Ω, a low-noise bench supply, a calibrated source meter for controlled currents, a high-bandwidth oscilloscope with low-capacitance probes, and FFT-capable analysis. Thermal characterization used an environmental chamber. Key layout notes: short Kelvin traces to the amplifier inputs, local ground islands for analog return, and supply decoupling within 5 mm of the device.
Procedures started with a 30–60 minute warm-up, zero-current offset capture, and calibration of shunt resistance with a calibrated DMM. Offset was measured at zero current with averaging and defined bandwidth limits; gain error and linearity were obtained by stepping current across the target range; noise spectral density used FFT on the scope with known input termination; CMRR and PSRR sweeps varied common-mode and supply while recording output deviation. Repeatability used multiple runs and an error budget covering shunt tolerance, ADC/probe loading, and temperature.
Measured input offset near room temperature commonly fell in the 140–180 μV range (typical ~160 μV), close to the datasheet figure. At 100 V/V this equates to ~16 mV output offset. Gain error across the mid-range currents was typically under 0.1% with good linearity over ±50 mV shunt spans; worst-case error sources observed were offset drift with temperature and shunt tolerance. Recommended plots: Vout vs I_sense and percent error vs current to visualize these contributors in system terms.
Noisy floor measured as a noise spectral density on the order of single-digit nV/√Hz (integrated RMS noise dependent on measurement bandwidth). With a 0.01 Ω shunt and 100 V/V, the smallest resolvable RMS current is in the low-μA range when integrating to typical ADC bandwidths. Measured CMRR degrades at high common-mode voltages—practical impact: high-side sensing at elevated CM voltages will limit achievable resolution unless system filtering or larger shunts are used. PSRR tests show modest sensitivity to supply ripple; good decoupling markedly improves PSRR in practice.
At 100 V/V the measured −3 dB point was near the datasheet value, typically slightly below 650 kHz depending on load capacitance. Step responses with realistic shunt-driven current steps showed rise times consistent with the measured bandwidth and low overshoot with proper output loading. For PWM or motor-current sensing, designers should match ADC sample timing to settled window and consider anti-aliasing filters to avoid ringing-induced measurement error.
Device dissipation is low, but on small PCBs junction-to-ambient temp rise is notable if placed near hot power components. Offset drift vs ambient was measurable and typically tens to a few hundreds of nV/°C at the input; designers should budget worst-case offset drift and add temperature compensation or calibration if tight accuracy is required across wide temperature ranges.
| Metric | INA299A3IDBVR (measured) | Typical alternatives |
|---|---|---|
| Input offset | ~160 μV | Varies: some lower-offset parts exist but larger packages |
| Bandwidth | ~600–650 kHz | Higher-bandwidth amplifiers trade higher noise or quiescent current |
| Quiescent current | ~650 μA | Lower-power alternatives at cost of speed/accuracy |
Checklist: choose shunt range to produce 10–50 mV at nominal current for best SNR with 100 V/V; use Kelvin layout and local decoupling (0.1 μF + 1 μF close to V+); reserve headroom for common-mode conditions; calibrate offset at system level and include temperature compensation if needed. Choose this part when 100 V/V and compact packaging are priorities; consider other parts if you need ultra-wide bandwidth or minimal quiescent current.
Engineers should evaluate the INA299A3IDBVR against system requirements, run the outlined tests in their own measurement chain, and apply the checklist to achieve the stated performance benchmarks and meet the device specs.
Input offset (typical ~150 μV) multiplied by the 100 V/V gain produces a fixed output offset; with a small shunt this maps to a baseline current error. Mitigation strategies include offset calibration at zero current, selecting a slightly larger shunt to improve SNR, and temperature compensation to control drift over the operating range.
Measured −3 dB near the datasheet value supports many PWM applications, but transient settling and anti-aliasing must be considered. Match ADC sampling to the amplifier settling window and add filtering to suppress switching harmonics that increase measured RMS noise and apparent current ripple.
Use Kelvin shunt connections, minimize input trace length, place decoupling caps within millimeters of the supply pin, keep noisy switching nodes away from analog traces, and implement a solid analog ground island. These measures reduce common-mode injection, improve CMRR in practice, and lower noise coupling to the amplifier inputs.




